Dominant-Pole Compensation

We saw that capacitive loading caused potential instabilities, thus an op amp loaded with an output capacitor is a circuit configuration that must be analyzed. This circuit is called dominant pole compensation because if the pole formed by the op amp output impedance and the loading capacitor is located close to the zero frequency axis, it becomes dominant. The op amp circuit is shown in Figure 7–8, and the open loop circuit used to calculate the loop gain (Aβ) is shown in Figure 7–9.

Figure 7–8. Capacitively-Loaded Op Amp

Figure 7–9. Capacitively-Loaded Op Amp With Loop Broken for Loop Gain (Aβ)

Calculation

The analysis starts by looking into the capacitor and taking the Thevenin equivalent circuit.

Then the output equation is written.

Rearranging terms yields Equation 7–5.

When the assumption is made that (ZF + ZG) >> ZO, Equation 7–5 reduces to Equation 7–6.

Equation 7–7 models the op amp as a second-order system. Hence, substituting the second-order model for a in Equation 7–6 yields Equation 7–8, which is the stability equation for the dominant-pole compensation circuit.

Several conclusions can be drawn from Equation 7–8 depending on the location of the poles. If the Bode plot of Equation 7–7, the op amp transfer function, looks like that shown in Figure 7–10, it only has 25° phase margin, and there is approximately 48% overshoot.

When the pole introduced by ZO and CL moves towards the zero frequency axis it comes close to the τ2 pole, and it adds phase shift to the system. Increased phase shift increases peaking and decreases stability. In the real world, many loads, especially cables, are capacitive, and an op amp like the one pictured in Figure 7–10 would ring while driving a capacitive load. The load capacitance causes peaking and instability in internally compensated op amps when the op amps do not have enough phase margin to allow for the phase shift introduced by the load.

Figure 7–10. Possible Bode Plot of the Op Amp Described in Equation 7–7

Prior to compensation, the Bode plot of an uncompensated op amp looks like that shown in Figure 7–11. Notice that the break points are located close together thus accumulating about 180° of phase shift before the 0 dB crossover point; the op amp is not usable and probably unstable. Dominant pole compensation is often used to stabilize these op amps.

If a dominant pole, in this case ωD, is properly placed it rolls off the gain so that τ1 introduces 45 phase at the 0-dB crossover point. After the dominant pole is introduced the op amp is stable with 45° phase margin, but the op amp gain is drastically reduced for frequencies higher than ωD. This procedure works well for internally compensated op amps, but is seldom used for externally compensated op amps because inexpensive discrete capacitors are readily available.

Figure 7–11.Dominant-Pole Compensation Plot

Assuming that ZO << ZF, the closed-loop transfer function is easy to calculate because CL is enclosed in the feedback loop. The ideal closed-loop transfer equation is the same as Equation 6–11 for the noninverting op amp, and is repeated below as Equation 7–9.

When a ⇒ ∞ Equation 7–9 reduces to Equation 7–10.

As long as the op amp has enough compliance and current to drive the capacitive load, and ZO is small, the circuit functions as though the capacitor was not there. When the capacitor becomes large enough, its pole interacts with the op amp pole causing instability. When the capacitor is huge, it completely kills the op amp’s bandwidth, thus lowering the noise while retaining a large low-frequency gain.