CFA Model
The CFA model is shown in Figure 8–1. The noninverting input of a CFA connects to the input of the input buffer, so it has very high impedance similar to that of a bipolar transistor noninverting VFA input. The inverting input connects to the input buffer’s output, so the inverting input impedance is equivalent to a buffer’s output impedance, which is very low.
ZB models the input buffer’s output impedance, and it is usually less than 50 Ω. The input buffer gain, GB, is as close to one as IC design methods can achieve, and it is small enough to neglect in the calculations.
Figure 8–1. Current-Feedback Amplifier Model
The output buffer provides low output impedance for the amplifier. Again, the output buffer gain, GOUT, is very close to one, so it is neglected in the analysis. The output impedance of the output buffer is ignored during the calculations. This parameter may influence the circuit performance when driving very low impedance or capacitive loads, but this is usually not the case. The input buffer’s output impedance can’t be ignored because affects stability at high frequencies.
The current-controlled current source, Z, is a transimpedance. The transimpedance in a CFA serves the same function as gain in a VFA; it is the parameter that makes the performance of the op amp dependent only on the passive parameter values. Usually the transimpedance is very high, in the MΩ range, so the CFA gains accuracy by closing a feedback loop in the same manner that the VFA does.
Development of the Stability Equation
The stability equation is developed with the aid of Figure 8–2. Remember, stability is independent of the input, and stability depends solely on the loop gain, Aβ. Breaking the loop at point X, inserting a test signal, VTI, and calculating the return signal VTO develops the stability equation.
Figure 8–2. Stability Analysis Circuit
The circuit used for stability calculations is shown in Figure 8–3 where the model of Figure 8–1 is substituted for the CFA symbol. The input and output buffer gain, and output buffer output impedance have been deleted from the circuit to simplify calculations. This approximation is valid for almost all applications.
Figure 8–3. Stability Analysis Circuit
The transfer equation is given in Equation 8–1, and the Kirchoff”s law is used to write Equations 8–2 and 8–3.
Equations 8–2 and 8–3 are combined to yield Equation 8–4.
Dividing Equation 8–1 by Equation 8–4 yields Equation 8–5, and this is the open loop transfer equation. This equation is commonly known as the loop gain.
The Noninverting CFA
The closed-loop gain equation for the noninverting CFA is developed with the aid of Figure 8–4, where external gain setting resistors have been added to the circuit. The buffers are shown in Figure 8–4, but because their gains equal one and they are included within the feedback loop, the buffer gain does not enter into the calculations.
Figure 8–4. Noninverting CFA
Equation 8–6 is the transfer equation, Equation 8–7 is the current equation at the inverting node, and Equation 8–8 is the input loop equation. These equations are combined to yield the closed-loop gain equation, Equation 8–9.
When the input buffer output impedance, ZB, approaches zero, Equation 8–9 reduces to Equation 8–10.
When the transimpedance, Z, is very high, the term ZF/Z in Equation 8–10 approaches zero, and Equation 8–10 reduces to Equation 8–11; the ideal closed-loop gain equation for the CFA. The ideal closed-loop gain equations for the CFA and VFA are identical, and the degree to which they depart from ideal is dependent on the validity of the assumptions.
The VFA has one assumption that the direct gain is very high, while the CFA has two assumptions, that the transimpedance is very high and that the input buffer output impedance is very low. As would be expected, two assumptions are much harder to meet than one, thus the CFA departs from the ideal more than the VFA does.
The Inverting CFA
The inverting CFA configuration is seldom used because the inverting input impedance is very low (ZB||ZF +ZG). When ZG is made dominant by selecting it as a high resistance value it overrides the effect of ZB. ZF must also be selected as a high value to achieve at least unity gain, and high values for ZF result in poor bandwidth performance, as we will see in the next section. If ZG is selected as a low value the frequency sensitive ZB causes the gain to increase as frequency increases. These limitations restrict inverting applications of the inverting CFA.
Figure 8–5. Inverting CFA
The current equation for the input node is written as Equation 8–12. Equation 8–13 defines the dummy variable, VA, and Equation 8–14 is the transfer equation for the CFA.
These equations are combined and simplified leading to Equation 8–15, which is the closed-loop gain equation for the inverting CFA.
When ZB approaches zero, Equation 8–15 reduces to Equation 8–16.
When Z is very large, Equation 8–16 becomes Equation 8–17, which is the ideal closed loop gain equation for the inverting CFA.
The ideal closed-loop gain equation for the inverting VFA and CFA op amps are identical. Both configurations have lower input impedance than the noninverting configuration has, but the VFA has one assumption while the CFA has two assumptions. Again, as was the case with the noninverting counterparts, the CFA is less ideal than the VFA because of the two assumptions. The zero ZB assumption always breaks down in bipolar junction transistors as is shown later. The CFA is almost never used in the differential amplifier configuration because of the CFA’s gross input impedance mismatch.
Stability Analysis
The stability equation is repeated as Equation 8–18.
Comparing Equations 8–9 and 8–15 to Equation 8–18 reveals that the inverting and noninverting CFA op amps have identical stability equations. This is the expected result because stability of any feedback circuit is a function of the loop gain, and the input signals have no affect on stability. The two op amp parameters affecting stability are the transimpedance, Z, and the input buffer’s output impedance, ZB. The external components affecting stability are ZG and ZF. The designer controls the external impedance, although stray capacitance that is a part of the external impedance sometimes seems to be uncontrollable. Stray capacitance is the primary cause of ringing and overshoot in CFAs. Z and ZB are CFA op amp parameters that can’t be controlled by the circuit designer, so he has to live with them.
Prior to determining stability with a Bode plot, we take the log of Equation 8–18, and plot the logs (Equations 8–19 and 8–20) in Figure 8–6.
This enables the designer to add and subtract components of the stability equation graphically.
Figure 8–6. Bode Plot of Stability Equation
The plot in Figure 8–6 assumes typical values for the parameters:
The transimpedance has two poles and the plot shows that the op amp will be unstable without the addition of external components because 20 LOG|Z| crosses the 0-dB axis after the phase shift is 180°. ZF, ZB, and ZG reduce the loop gain 61.1 dB, so the circuit is stable because it has 60°-phase margin. ZF is the component that stabilizes the circuit.
The parallel combination of ZF and ZG contribute little to the phase margin because ZB is very small, so ZB and ZG have little effect on stability.
The manufacturer determines the optimum value of RF during the characterization of the IC. Referring to Figure 8–6, it is seen that when RF exceeds the optimum value recommended by the IC manufacturer, stability increases. The increased stability has a price called decreased bandwidth. Conversely, when RF is less than the optimum value recommended by the IC manufacturer, stability decreases, and the circuit response to step inputs is overshoot or possibly ringing. Sometimes the overshoot associated with less than optimum RF is tolerated because the bandwidth increases as RF decreases. The peaked response associated with less than optimum values of RF can be used to compensate for cable droop caused by cable capacitance.
When ZB = 0 Ω and ZF = RF the loop gain equation is; Aβ = Z/RF. Under these conditions Z and RF determine stability, and a value of RF can always be found to stabilize the circuit. The transimpedance and feedback resistor have a major impact on stability, and the input buffer’s output impedance has a minor effect on stability. Since ZB increases with an increase in frequency, it tends to increase stability at higher frequencies. Equation 8–18 is rewritten as Equation 8–24, but it has been manipulated so that the ideal closed-loop gain is readily apparent.
The closed-loop ideal gain equation (inverting and noninverting) shows up in the denominator of Equation 8–24, so the closed-loop gain influences the stability of the op amp. When ZB approaches zero, the closed-loop gain term also approaches zero, and the op amp becomes independent of the ideal closed-loop gain. Under these conditions RF determines stability, and the bandwidth is independent of the closed-loop gain. Many people claim that the CFA bandwidth is independent of the gain, and that claim’s validity is dependent on the ratios ZB/ZF being very low.
ZB is important enough to warrant further investigation, so the equation for ZB is given below.
At low frequencies hib = 50 Ω and RB/(β0+1) = 25 Ω, so ZB = 75 Ω. ZB varies in accordance with Equation 8–25 at high frequencies. Also, the transistor parameters in Equation 8–25 vary with transistor type; they are different for NPN and PNP transistors. Because ZB is dependent on the output transistors being used, and this is a function of the quadrant the output signal is in, ZB has an extremely wide variation. ZB is a small factor in the equation, but it adds a lot of variability to the current-feedback op amp.
Selection of the Feedback Resistor
The feedback resistor determines stability, and it affects closed-loop bandwidth, so it must be selected very carefully. Most CFA IC manufacturers employ applications and product engineers who spend a great deal of time and effort selecting RF. They measure each noninverting gain with several different feedback resistors to gather data. Then they pick a compromise value of RF that yields stable operation with acceptable peaking, and that value of RF is recommended on the data sheet for that specific gain. This procedure is repeated for several different gains in anticipation of the various gains their customer applications require (often G = 1, 2, or 5). When the value of RF or the gain is changed from the values recommended on the data sheet, bandwidth and/or stability is affected.
When the circuit designer must select a different RF value from that recommended on the data sheet he gets into stability or low bandwidth problems. Lowering RF decreases stability, and increasing RF decreases bandwidth. What happens when the designer needs to operate at a gain not specified on the data sheet? The designer must select a new value of RF for the new gain, but there is no guarantee that new value of RF is an optimum value.
One solution to the RF selection problem is to assume that the loop gain, Aβ, is a linear function. Then the assumption can be made that (Aβ)1 for a gain of one equals (Aβ)N for a gain of N, and that this is a linear relationship between stability and gain. Equations 8–26 and 8–27 are based on the linearity assumption.
Equation 8–27 leads one to believe that a new value for ZF can easily be chosen for each new gain. This is not the case in the real world; the assumptions don’t hold up well enough to rely on them. When you change to a new gain not specified on the data sheet, Equation 8–27, at best, supplies a starting point for RF, but you must test to determine the final value of RF.
When the RF value recommended on the data sheet can’t be used, an alternate method of selecting a starting value for RF is to use graphical techniques. The graph shown in Figure 8–7 is a plot of the typical 300-MHz CFA data given in Table 8–1.
Figure 8–7. Plot of CFA RF, G, and BW
Table 8–1. Data Set for Curves in Figure 8–7
Enter the graph at the new gain, say ACL = 6, and move horizontally until you reach the intersection of the gain versus feedback resistance curve. Then drop vertically to the resistance axis and read the new value of RF (500 Ω in this example). Enter the graph at the new value of RF, and travel vertically until you intersect the bandwidth versus feedback resistance curve. Now move to the bandwidth axis to read the new bandwidth (75 MHz in this example). As a starting point you should expect to get approximately 75 MHz BW with a gain of 6 and RF = 500 Ω. Although this technique yields more reliable solutions than Equation 8–27 does, op amp peculiarities, circuit board stray capacitances, and wiring make extensive testing mandatory. The circuit must be tested for performance and stability at each new operating point.
Stability and Input Capacitance
When designer lets the circuit board introduce stray capacitance on the inverting input node to ground, it causes the impedance ZG to become reactive. The new impedance, ZG, is given in Equation 8–28, and Equation 8–29 is the stability equation that describes the situation.
Equation 8–29 is the stability equation when ZG consists of a resistor in parallel with stray capacitance between the inverting input node and ground. The stray capacitance, CG, is a fixed value because it is dependent on the circuit layout. The pole created by the stray capacitance is dependent on RB because it dominates RF and RG. RB fluctuates with manufacturing tolerances, so the RBCG pole placement is subject to IC manufacturing tolerances. As the RBCG combination becomes larger, the pole moves towards the zero frequency axis, lowering the circuit stability. Eventually it interacts with the pole contained in Z, 1/τ2, and instability results. The effects of stray capacitance on CFA closed-loop performance are shown in Figure 8–8.
Figure 8–8. Effects of Stray Capacitance on CFAs
Notice that the introduction of CG causes more than 3 dB peaking in the CFA frequency response plot, and it increases the bandwidth about 18 MHz. Two picofarads are not a lot of capacitance because a sloppy layout can easily add 4 or more picofarads to the circuit.
Stability and Feedback Capacitance
When a stray capacitor is formed across the feedback resistor, the feedback impedance is given by Equation 8–31. Equation 8–32 gives the loop gain when a feedback capacitor has been added to the circuit.
This loop gain transfer function contains a pole and zero, thus, depending on the pole/zero placement, oscillation can result. The Bode plot for this case is shown in Figure 8–9. The original and composite curves cross the 0-dB axis with a slope of –40 dB/decade, so either curve can indicate instability. The composite curve crosses the 0-dB axis at a higher frequency than the original curve, hence the stray capacitance has added more phase shift to the system. The composite curve is surely less stable than the original curve. Adding capacitance to the inverting input node or across the feedback resistor usually results in instability. RB largely influences the location of the pole introduced by CF, thus here is another case where stray capacitance leads to instability.
Figure 8–9. Bode Plot with CF
Figure 8–8 shows that CF = 2 pF adds about 4 dB of peaking to the frequency response plot. The bandwidth increases about 10 MHz because of the peaking. CF and CG are the major causes of overshoot, ringing, and oscillation in CFAs, and the circuit board layout must be carefully done to eliminate these stray capacitances.
Compensation of CF and CG
When CF and CG both are present in the circuit they may be adjusted to cancel each other out. The stability equation for a circuit with CF and CG is Equation 8–33.
If the zero and pole in Equation 8–33 are made to cancel each other, the only poles remaining are in Z. Setting the pole and zero in Equation 8–33 equal yields Equation 8–34 after some algebraic manipulation.
RB dominates the parallel combination of RB and RG, so Equation 8–34 is reduced to Equation 8–35.
RB is an IC parameter, so it is dependent on the IC process. RB it is an important IC parameter, but it is not important enough to be monitored as a control variable during the manufacturing process. RB has widely spread, unspecified parameters, thus depending on RB for compensation is risky. Rather, the prudent design engineer assures that the circuit will be stable for any reasonable value of RB, and that the resulting frequency response peaking is acceptable.
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